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Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V Extension
semiwiki.com·1d
🔧RISC-V
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FlipFlop: A Static Analysis-based Energy Optimization Framework for GPU Kernels
arxiv.org·15h
🧠Memory Hierarchy
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Setting Up A Cluster of Tiny PCs For Parallel Computing - A Note To Myself
kenkoonwong.com·1h·
Discuss: Hacker News
🔀SIMD Programming
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CUDA Programming: From Zero to GPU Kernels
pythongiant.github.io·9h·
Discuss: Hacker News
🔀SIMD Programming
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Scalable Adaptive Memory Compiler Optimization via Multi-Objective Evolutionary Algorithms
dev.to·18h·
Discuss: DEV
🧠Memory Hierarchy
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SHADOW: Simultaneous Multi-Threading Architecture with Asymmetric Threads
danglingpointers.substack.com·1d·
Discuss: Substack
🤝Cooperative Threading
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CPU-less parallel execution of lambda calculus in digital logic
arxiv.org·15h
📏Linear Scanning
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ANN v3: 200ms p99 query latency over 100 billion vectors
turbopuffer.com·20h·
Discuss: Hacker News
Cache-Aware Algorithms
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Python Code Optimization Tips
denvaar.dev·17h
Interpreter Optimization
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Adjusting One Line Of Linux Code Yields 5x Wakeup Latency Reduction For Modern Xeon CPUs
phoronix.com·9h
Instruction Fusion
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Clockworker: single-threaded async executor with powerful scheduling to sit on top of async runtimes
github.com·1d·
Discuss: r/rust
⏱️Async Runtimes
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MLflow vs Kubeflow vs Airflow: Choosing the Right MLOps Tool for Real-World Production Systems
pub.towardsai.net
·1d
🌪️V8 TurboFan
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Optimizing GPU Programs from Java using Babylon and HAT
openjdk.org·1d·
🔀SIMD Programming
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High-Availability Feature Flagging at Databricks
databricks.com·39m
🏰Capability Machines
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Introducing PCIem
cakehonolulu.github.io·1d
🗺️Memory Mapping
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One ISA, Infinite Use Cases: RISC-V and the Road to Workload-Specific Silicon
riscv.org·55m
🔧RISC-V
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The Real-time Graphics Tool
notch.one·15h
Live Programming
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The Story on ISPC (Intel SPMD Program Compiler)
pharr.org·1d·
Discuss: Hacker News
🔀SIMD Programming
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Addressing Critical Tradeoffs In NPU Design
semiengineering.com·12h
🏰Capability Machines
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